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| CHR0100a 5.8GHz I/Q Mixer GaAs Monolithic Microwave IC Description The CHR0100a is a single chip MMIC including an I/Q mixer and a RF gain block that minimises the overall conversion loss of the receiver and provides the RF signal to the mixer through a power divider. The circuit is manufactured with the PHEMT process : 0.25m gate length, via holes through the substrate, air bridges and electron beam gate lithography. It is supplied in chip form or in ceramic leadless chip carrier. Vg I Q Vd RF LO Block diagram Main Features 5.8GHz centre frequency DC-50MHz IF bandwidth Low noise figure Low I/Q phase & amplitude unbalance Chip size : 1.77 x 1.37 x 0.10 mm Conversion gain (RF to I; RF to Q) and phase unbalance Main Characteristics Tamb = +25C Symbol Fop Cg Plo Parameter Operating frequency range Conversion gain (RF to I; RF to Q) LO input power Min. 5.725 -4 Typ. 5.8 -2.5 6 Max. 5.875 Unit GHz dB dBm ESD Protections : Electrostatic discharge sensitive device observe handling precaution ! Ref. : DSCHR01000161 -9-Jun-00 1/6 Specifications subject to change without notice United Monolithic Semiconductors S.A.S. Route Departementale 128 - B.P.46 - 91401 Orsay Cedex France Tel. : +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 CHR0100a Electrical Characteristics Tamb = +25C Symbol Fop BWif Cg NF Pif_1dB Plo Cg Vd Id Parameter Operating frequency range IF frequency band Conversion gain, RF to I or RF to Q 5.8GHz Image rejection mixer Test conditions Min. 5.725 DC Typ. 5.8 Max. 5.875 50 Unit GHz MHz dB dB dBm dBm (1) -4 -2.5 5 -5 Noise figure (DSB), RF to I or RF to Q IF=10MHz I or Q IF output power at 1dB compression gain LO input power I/Q phase unbalance I/Q amplitude unbalance Positive bias voltage Bias current 5 8 10 0.5 4 15 25 15 1.0 dB V mA (1) Conversion gain will be 3dB higher after I/Q combination. Absolute Maximum Ratings (1) Tamb = +25C Symbol Vd Vg Pin Top Tstg Parameter Positive supply voltage Negative supply voltage Maximum peak input power overdrive (2) Operating temperature range Storage temperature range Values 6 -2 to 0 10 -50 to 70 -55 to 155 Unit V V dBm C C (1) Operation of this device above anyone of these parameters may cause permanent damage (2) Duration < 1s. Ref. : DSCHR01000161 -9-Jun-00 2/6 Specifications subject to change without notice Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 5.8GHz Image Rejection Mixer Chip Pad Allocation VgI VgQ I Q CHR0100a Vd LO CHR0100a RF VgQ Q Input And Output Pin References Pin RF LO VgI VgQ Vd I Q Description RF signal input LO signal input I mixer negative supply voltage Q mixer negative supply voltage Positive supply voltage First IF output Second IF output (in quadrature) Connection of only one of the two VgQ and Q pads is necessary VgI, VgQ only necessary for low LO power Ref. : DSCHR01000161 -9-Jun-00 3/6 Specifications subject to change without notice Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 CHR0100a Typical Bias Configuration 5.8GHz Image rejection mixer The typical bias voltage applied to the chip is Vd = 4V. If the LO power is low (ex: < 5dBm) one can apply a negative voltage (-0.3V) on Vg to improve and secure the conversion characteristic. Each Vg and Vd port should have a 10nF decoupling capacitor to the ground. Connection of only one of the two VgQ and Q pads is necessary VgI 10nF VgQ 10nF I Q Vd 10nF LO CHR0100a RF 10nF VgQ Q Chip Mechanical Data CHR0100a Chip size 1770 20 m x 1370 20 m Chip thickness 100 10 m Ref. : DSCHR01000161 -9-Jun-00 4/6 Specifications subject to change without notice Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 5.8GHz Image Rejection Mixer CHR0100a General tolerance Package Pin Allocation (SJ) Pin RF LO VgI VgQ Vd I Q Number 20 11 7 6 1 4 3 10,12,15,17, 19,21 2,5,8,9,13,14, 16,18,22,23,24 Description RF signal input LO signal input I mixer negative supply voltage Q mixer negative supply voltage Positive supply voltage First IF output Second IF output (in quadrature) GROUND Not connected Ref. : DSCHR01000161 -9-Jun-00 5/6 Specifications subject to change without notice Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 CHR0100a 5.8GHz Image rejection mixer Ordering Information Chip form Package : CHR0100a99F/00 : CHR0100aSJF/24 Information furnished is believed to be accurate and reliable. However United Monolithic Semiconductors S.A.S. assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of United Monolithic Semiconductors S.A.S.. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. United Monolithic Semiconductors S.A.S. products are not authorised for use as critical components in life support devices or systems without express written approval from United Monolithic Semiconductors S.A.S. Ref. : DSCHR01000161 -9-Jun-00 6/6 Specifications subject to change without notice Route Departementale 128 , B.P.46 - 91401 ORSAY Cedex - FRANCE Tel.: +33 (0)1 69 33 03 08 - Fax : +33 (0)1 69 33 03 09 |
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